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LTC3406-1.2
1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT
FEATURES

DESCRIPTIO
High Efficiency: Up to 90% Very Low Quiescent Current: Only 20A 600mA Output Current at VIN = 3V 2.5V to 5.5V Input Voltage Range 1.5MHz Constant Frequency Operation No Schottky Diode Required Shutdown Mode Draws < 1A Supply Current Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (1mm) ThinSOTTM Package
The LTC (R)3406-1.2 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation with only 20A drops <1A in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3406-1.2 ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. PWM pulse skipping mode operation provides very low output ripple voltage for noise sensitive applications. Switching frequency is internally set at 1.5MHz, allowing the use of small surface mount inductors and capacitors. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. The LTC3406-1.2 is available in a low profile (1mm) ThinSOT package.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ThinSOT is a trademark of Linear Technology Corporation. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
APPLICATIO S

Cellular Telephones Personal Information Appliances Wireless and DSL Modems Digital Still Cameras MP3 Players Portable Instruments
TYPICAL APPLICATIO
Efficiency and Power Loss High Efficiency Step-Down Converter
2.2H VIN 2.7V TO 5.5V CIN 4.7F CER VIN SW COUT 10F CER
340612 TA01a
100 90 EFFICIENCY
LTC3406-1.2 RUN VOUT GND
EFFICIENCY (%)
VOUT 1.2V 600mA
80 70 60 50 40 30 20 10 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 100 10 LOAD CURRENT (mA) POWER LOSS
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0.01
0.001
0.0001
0.00001 1000
340612 TA01b
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ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW RUN 1 GND 2 SW 3 4 VIN 5 VOUT
Input Supply Voltage .................................. - 0.3V to 6V RUN, VOUT Voltages................................... - 0.3V to VIN SW Voltage (DC) ......................... - 0.3V to (VIN + 0.3V) P-Channel Switch Source Current (DC) ............. 800mA N-Channel Switch Sink Current (DC) ................. 800mA Peak SW Sink and Source Current (VIN = 3V)........ 1.3A Operating Temperature Range (Note 2) .. - 40C to 85C Junction Temperature (Notes 3, 5) ...................... 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC3406ES5-1.2 S5 PART MARKING LTBMQ
S5 PACKAGE 5-LEAD PLASTIC TSOT-23
TJMAX = 125C, JA = 250C/ W, JC = 90C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 3.6V unless otherwise specified.
SYMBOL VOUT VOVL VOUT IPK VLOADREG VIN IS PARAMETER Regulated Output Voltage Output Overvoltage Lockout Output Voltage Line Regulation Peak Inductor Current Output Voltage Load Regulation Input Voltage Range Input DC Bias Current Active Mode Sleep Mode Shutdown Oscillator Frequency RDS(ON) of P-Channel FET RDS(ON) of N-Channel FET SW Leakage RUN Threshold RUN Leakage Current (Note 4) VOUT = 1.08V, ILOAD = 0A VOUT = 1.236V, ILOAD = 0A VRUN = 0V, VIN = 5.5V VOUT = 1.2V VOUT = 0V ISW = 100mA ISW = -100mA VRUN = 0V, VSW = 0V or 5V, VIN = 5V

ELECTRICAL CHARACTERISTICS
CONDITIONS IOUT = 100mA VOVL = VOVL - VOUT VIN = 2.5V to 5.5V VIN = 3V, VOUT = 1.08V, Duty Cycle < 35%

MIN 1.164 2.5 0.75 2.5
TYP 1.2 6.25 0.04 1 0.5
MAX 1.236 10 0.4 1.25 5.5
UNITS V % %/V A % V A A A MHz kHz A V A
300 20 0.1 1.2 1.5 210 0.4 0.35 0.01 0.3 1 0.01
400 35 1 1.8 0.5 0.45 1 1.5 1
fOSC RPFET RNFET ILSW VRUN IRUN
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3406E-1.2 is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LTC3406-1.2: TJ = TA + (PD)(250C/W)
Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
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LTC3406-1.2
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1) Efficiency vs Input Voltage
100 95
EFFICIENCY (%)
100 90
IOUT = 100mA 85 IOUT = 10mA 80 75 70 2 3 5 4 INPUT VOLTAGE (V) 6
340612 G01
EFFICIENCY (%)
90
REFERENCE VOLTAGE (V)
IOUT = 600mA
Oscillator Frequency vs Temperature
1.70 VIN = 3.6V 1.65 1.8
OSCILLATOR FREQUENCY (MHz)
1.55 1.50 1.45 1.40 1.35 1.30 -50 -25 50 25 75 0 TEMPERATURE (C) 100 125
1.6 1.5 1.4 1.3 1.2
OUTPUT VOLTAGE (V)
1.60
FREQUENCY (MHz)
RDS(ON) vs Input Voltage
0.7 0.6 0.5 RDS(ON) () 0.4 0.3 0.2 0.1 0 0 1 5 4 2 3 INPUT VOLTAGE (V) 6 7 TA = 25C 0.7 0.6
RDS(ON) ()
MAIN SWITCH
0.5 0.4 0.3 0.2 0.1 0 -50 -25 MAIN SWITCH SYNCHRONOUS SWITCH 50 25 75 0 TEMPERATURE (C) 100 125
SUPPLY CURRENT (A)
SYNCHRONOUS SWITCH
UW
340612 G07
TA = 25C unless otherwise specified. Reference Voltage vs Temperature
1.228 VIN = 3.6V 1.218 1.208 1.198 1.188 1.178 1.168 -50 -25
Efficiency and Power Loss
80 70 60 50 40 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 ILOAD (mA) 100 1000
340612 GO2
50 25 75 0 TEMPERATURE (C)
100
125
340612 G03
Oscillator Frequency vs Supply Voltage
TA = 25C 1.225
Output Voltage vs Load Current
1.7
1.215
1.205
1.195
1.185
1.175 2 3 4 5 SUPPLY VOLTAGE (V) 6
340612 G05
0 100 200 300 400 500 600 700 800 900 1000 LOAD CURRENT (mA)
340612 G06
340612 G04
RDS(ON) vs Temperature
50
Supply Current vs Supply Voltage
45 40 35 30 25 20 15 10 5 0 2 4 3 5 SUPPLY VOLTAGE (V) 6
340612 G09
VIN = 2.7V VIN = 4.2V VIN = 3.6V
ILOAD = 0A
340612 G08
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LTC3406-1.2 TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1) Supply Current vs Temperature
50 45 40 VIN = 3.6V ILOAD = 0A
SWITCH LEAKAGE (nA) 300 VIN = 5.5V RUN = 0V 250 200 150 100 50 0 -50 -25
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SUPPLY CURRENT (A)
35 30 25 20 15 10 5 0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125
Switch Leakage vs Input Voltage
120 100 SWITCH LEAKAGE (pA) 80 60 40 20 0 RUN = 0V TA = 25C SYNCHRONOUS SWITCH
0
1
(From Figure 1a Except for the Resistive Divider Resistor Values) Load Step
RUN 2V/DIV VOUT 1V/DIV IL 500mA/DIV
VOUT 100mV/DIV AC COUPLED ILOAD 500mA/DIV IL 500mA/DIV
40s/DIV VIN = 3.6V ILOAD = 100mA TO 600mA
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Switch Leakage vs Temperature
MAIN SWITCH SYNCHRONOUS SWITCH 50 25 75 0 TEMPERATURE (C) 100 125
340612 G10
340612 G11
Discontinuous Operation
SW 2V/DIV VOUT 50mV/DIV AC COUPLED IL 200mA/DIV 4s/DIV VIN = 3.6V ILOAD = 25mA
3406B12 G13
MAIN SWITCH
2 3 4 INPUT VOLTAGE (V)
5
6
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Load Step
340612 G14
20s/DIV VIN = 3.6V ILOAD = 25mA TO 600mA
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LTC3406-1.2
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values) Load Step
VOUT 100mV/DIV AC COUPLED ILOAD 500mA/DIV IL 500mA/DIV VOUT 100mV/DIV AC COUPLED ILOAD 500mA/DIV IL 500mA/DIV
VIN = 3.6V ILOAD = 100mA TO 600mA
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above 1.5V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1A supply current. Do not leave RUN floating. GND (Pin 2): Ground Pin. SW (Pin 3): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. VIN (Pin 4): Main Supply Pin. Must be closely decoupled to GND, Pin 2, with a 2.2F or greater ceramic capacitor. VOUT (Pin 5): Output Voltage Feedback Pin. An internal resistive divider divides the output voltage down for comparison to the internal reference voltage.
FU CTIO AL DIAGRA
OSC OSC
FREQ SHIFT VOUT 5 60k FB 120k 0.8V
VIN RUN 1 0.8V REF 0.8V + VOVL
SHUTDOWN
-
IRCMP
+
W
- +
OVDET
-
+
UW
Load Step
20s/DIV
340612 G16
20s/DIV VIN = 3.6V ILOAD = 200mA TO 600mA
340612 G17
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SLOPE COMP 0.65V
4 VIN
- + -
EA S R Q Q SWITCHING LOGIC AND BLANKING CIRCUIT ICOMP
+
5
RS LATCH OV
ANTISHOOTTHRU
3 SW
2 GND
3406B12 BD
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OPERATIO
VIN 2.7V TO 5.5V CIN** 4.7F CER
*MURATA LQH3C2R2M24 **TAIYO YUDEN JMK212BJ475MG TAIYO YUDEN JMK316BJ106ML
Figure 1. Typical Application
Main Control Loop The LTC3406-1.2 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, it causes a slight decrease in the feedback voltage, FB, relative to the 0.8V reference, which in turn causes the EA amplifier's output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. The comparator OVDET guards against transient overshoots >6.25% by
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(Refer to Functional Diagram)
VIN SW 3 2.2H* COUT 10F CER 5
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VOUT 1.2V 600mA
turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC3406-1.2 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. In Burst Mode operation, the peak current of the inductor is set to approximately 200mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 20A. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier's output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 210kHz, 1/7 the nominal frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. The oscillator's frequency will progressively increase to 1.5MHz when VOUT rises above 0V.
LTC3406-1.2 RUN 2 VOUT GND
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LTC3406-1.2
APPLICATIO S I FOR ATIO
The basic LTC3406-1.2 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 1H to 4.7H. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in equation 1. A reasonable starting point for setting ripple current is IL = 240mA (40% of 600mA).
IL =
V 1 VOUT 1 - OUT ( f)(L) VIN
The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 720mA rated inductor should be enough for most applications (600mA + 120mA). For better efficiency, choose a low DC-resistance inductor. Inductor Core Selection Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3406-1.2 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3406-1.2 applications.
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Table 1. Representative Surface Mount Inductors
PART NUMBER Sumida CDRH3D16 VALUE (H) 1.5 2.2 3.3 4.7 2.2 3.3 4.7 3.3 4.7 1.0 2.2 4.7 DCR ( MAX) 0.043 0.075 0.110 0.162 0.116 0.174 0.216 0.17 0.20 0.060 0.097 0.150 MAX DC SIZE CURRENT (A) W x L x H (mm3) 1.55 1.20 1.10 0.90 0.950 0.770 0.750 1.00 0.95 1.00 0.79 0.65 3.8 x 3.8 x 1.8 Sumida CMD4D06 Panasonic ELT5KT Murata LQH3C 3.5 x 4.3 x 0.8 4.5 x 5.4 x 1.2 2.5 x 3.2 x 2.0 (1)
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CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by:
[VOUT (VIN - VOUT )]1/ 2 CIN required IRMS IOMAX
VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR).
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APPLICATIO S I FOR ATIO
Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple VOUT is determined by:
1 VOUT IL ESR + 8fC OUT
where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since IL increases with input voltage. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC34061.2's control loop does not depend on the output capacitor's ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part.
POWER LOSS (W)
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When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3406-1.2 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 2.
1 0.1 0.01 0.001 0.0001 0.00001 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 LOAD CURRENT (mA) 1000
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Figure 2. Power Loss vs Load Current
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LTC3406-1.2
APPLICATIO S I FOR ATIO
1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 - DC) (2) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3406-1.2 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3406-1.2 is running at high ambient temperature with low supply voltage, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance.
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To avoid the LTC3406-1.2 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(JA) where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3406-1.2 with an input voltage of 2.7V, a load current of 600mA and an ambient temperature of 70C. From the typical performance graph of switch resistance, the RDS(ON) at 70C is approximately 0.52 for the P-channel switch and 0.42 for the N-channel switch. Using equation (2) to find the series resistance looking into the SW pin gives: RSW = 0.52(0.44) + 0.42(0.56) = 0.46 Therefore, power dissipated by the part is: PD = ILOAD2 * RSW = 165.6mW For the SOT-23 package, the JA is 250C/ W. Thus, the junction temperature of the regulator is: TJ = 70C + (0.1656)(250) = 111.4C which is below the maximum junction temperature of 125C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RSW). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD * ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT, which generates a feedback error signal.
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APPLICATIO S I FOR ATIO
The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 * CLOAD). Thus, a 10F capacitor charging to 3.3V would require a 250s rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3406-1.2. These items are also illustrated graphically in Figures 3 and 4. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 2. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 3. Keep the (-) plates of CIN and COUT as close as possible.
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RUN LTC3406-1.2 5
2
-
VOUT COUT
GND VOUT SW VIN CIN
+
3 L1
4
VIN
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Figure 3. LTC3406-1.2 Layout Diagram
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Design Example As a design example, assume the LTC3406-1.2 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.6A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. With this information we can calculate L using equation (1),
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L=
1.2V 1 1.2V 1 - ( f)(IL ) VIN
(3)
Substituting VIN = 4.2V, IL = 240mA and f = 1.5MHz in equation (3) gives: L= 1.2V 1.2V 1 - = 2.38 H 1.5MHz(240mA) 4.2V
A 2.2H inductor works well for this application. For best efficiency choose a 720mA or greater inductor with less than 0.2 series resistance. CIN will require an RMS current rating of at least 0.3A ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.25. In most cases, a ceramic capacitor will satisfy this requirement.
VIA TO VOUT VIA TO VIN
VIN
PIN 1 VOUT L1 SW LTC3406-1.2
COUT GND
CIN
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Figure 4. LTC3406-1.2 Suggested Layout
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LTC3406-1.2
TYPICAL APPLICATIO S
Single Li-Ion 1.2V/600mA Regulator for Lowest Profile, 1mm High
VIN 2.7V TO 4.2V 4 CIN** 4.7F CER VIN RUN VOUT GND 2 *MURATA GRM219R60JI06KE19B **AVX06036D475MAT FDK MIPW3226D2R2M 5
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LTC3406-1.2 Efficiency
100 90 80
EFFICIENCY (%)
70 60 50 40 30 20 10 0 0.1 1 10 LOAD (mA) VIN = 2.7V VIN = 3.6V VIN = 4.2V 100 1000
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PACKAGE DESCRIPTIO
0.62 MAX
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC DATUM `A'
0.30 - 0.50 REF
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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2.2H COUT1* 10F CER
VOUT 1.2V
LTC3406-1.2 1
Load Step
VOUT 100mV/DIV AC COUPLED ILOAD 500mA/DIV IL 500mA/DIV 20s/DIV VIN = 3.6V ILOAD = 20mA TO 600mA
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S5 Package 5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.95 REF 2.90 BSC (NOTE 4)
1.22 REF
1.4 MIN
2.80 BSC
1.50 - 1.75 (NOTE 4)
PIN ONE 0.30 - 0.45 TYP 5 PLCS (NOTE 3)
0.95 BSC 0.80 - 0.90
0.09 - 0.20 (NOTE 3) 1.00 MAX
0.01 - 0.10
1.90 BSC
S5 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
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LTC3406-1.2 RELATED PARTS
PART NUMBER LT1616 LT1676 LTC1701/LT1701B LT1776 LTC1877 LTC1878 LTC1879 LTC3403 LTC3404 LTC3405/LTC3405A LTC3406 LTC3411 LTC3412 LTC3440 DESCRIPTION 500mA (IOUT), 1.4MHz, High Efficiency Step-Down DC/DC Converter 450mA (IOUT), 100kHz, High Efficiency Step-Down DC/DC Converter 750mA (IOUT), 1MHz, High Efficiency Step-Down DC/DC Converter 500mA (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 600mA (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 600mA (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 1.2A (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter with Bypass Transistor 600mA (IOUT), 1.4MHz, Synchronous Step-Down DC/DC Converter 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter COMMENTS
www..com
90% Efficiency, VIN = 3.6V to 25V, VOUT = 1.25V, IQ = 1.9mA, ISD = <1A, ThinSOT Package 90% Efficiency, VIN = 7.4V to 60V, VOUT = 1.24V, IQ = 3.2mA, ISD = 2.5A, S8 Package 90% Efficiency, VIN = 2.5V to 5V, VOUT = 1.25V, IQ = 135A, ISD = <1A, ThinSOT Package 90% Efficiency, VIN = 7.4V to 40V, VOUT = 1.24V, IQ = 3.2mA, ISD = 30A, N8, S8 Packages 95% Efficiency, VIN = 2.7V to 10V, VOUT = 0.8V, IQ = 10A, ISD = <1A, MS8 Package 95% Efficiency, VIN = 2.7V to 6V, VOUT = 0.8V, IQ = 10A, ISD = <1A, MS8 Package 95% Efficiency, VIN = 2.7V to 10V, VOUT = 0.8V, IQ = 15A, ISD = <1A, TSSOP-16 Package 96% Efficiency, VIN = 2.5V to 5.5V, VOUT = Dynamically Adjustable, IQ = 20A, ISD = <1A, DFN Package 95% Efficiency, VIN = 2.7V to 6V, VOUT = 0.8V, IQ = 10A, ISD = <1A, MS8 Package 96% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 20A, ISD = <1A, ThinSOT Package 96% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20A, ISD = <1A, ThinSOT Package 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60A, ISD = <1A, MS Package 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60A, ISD = <1A, TSSOP-16E Package 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 2.5V, IQ = 25A, ISD = <1A, MS Package
340612f
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT/TP 0105 1K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005


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